Training Course:Phase-Locked Loop Design TechniquesSchool/Trainer:UC Berkeley Extension
Berkeley, San Francisco, Redwood City, Oakland, California, United States
Course Format: Classroom | E-learning | Virtual Class | Online/Live | On-site/In-house | Blended | Self-paced
Course Description:
'' This four-day intensive course teaches students Phase Locked Loop (PLL) design techniques. It will explain basic PLL concepts including what PLLs do, review basic control loop and Laplace theories, and discuss PLL transfer functions. Students will learn commonly used PLL classes and orders along with their effects on PLL lock and stability, what PLL bandwidth means to the designer, and how to design loop filters. The course will cover common PLL applications in both wireless communications and digital logic design such as frequency synthesis and clock generation.
In addition, the course covers advanced concepts including noise bandwidth, noise sources within PLLs, relation of frequency domain noise to time jitter, as well as how and why it is important to reduce noise in the closed loop. Furthermore, students learn how to troubleshoot their PLL designs through the understanding of how and why PLLs do not lock in phase. Finally, the course includes design examples using National Semiconductor PLLs. Students learn through both theoretical examples as well as practical demonstrations of PLLs, and will leave this class with the knowledge of how to design PLLs for today’s wireless communication and digital logic applications.
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Elements of this syllabus are subject to change.
Please go to the school's official website for training price and schedule:
http://www.unex.berkeley.edu/
Phone:(510) 642-4111
School Address/Venue(s):
1995 University Ave.
Suite 110
Berkeley, California 94704-7000
USA
Jobs & Resumes: Berkeley, San Francisco, Redwood City, Oakland
Houses & Roommates: Berkeley, San Francisco, Redwood City, Oakland
Travel Agencies: San Francisco, Oakland
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