CES for Board Station Flow

Mentor Graphics Asia Pte Ltd
Singapore, Singapore

Course Format: Classroom | E-learning | Virtual Class | Online | On-site | Blended | Self-paced

Course Description:

'' CES is a Constraint Editor System, which gives you the ability to define and refine design constraints in a common environment that is accessible from many Mentor Graphics Corporation front-end and back-end design systems. This course is designed to cover all the necessary skills required to use CES efficiently and effectively in Board Station design flow. The labs in the course allow you to gain hands-on experience with the tool, defining both mechanical and high-speed constraints to meet today’s challenging PCB designs.

You will learn how to
Define the main concepts and constraints hierarchy of CES.
Enable CES as a constraint system in Board Station flow.
Find and filter data in the design database.
Navigate and manipulate the constraints hierarchy.
Use the spreadsheets, toolbars, preferences, and options efficiently.
Partition the design data using Net Classes, Constraint Classes and Schemes.
Set up mechanical constraints such as trace widths, via assignments and clearances.
Assign physical high-speed constraints including minimum and maximum delays, matched delays, delay formulas, custom and complex topologies, differential pairs, and parallelism rules to nets or group of nets.
Auto-route the constrained nets and evaluate the routing results.
Reuse already defined constraints in the same design or other designs using Constraint Templates.

Hands-On Labs
Throughout this course, extensive hands-on lab exercises provide you with practical experience using CES software. Hands-on lab topics include:

Adopting CES and synchronizing databases in the following design flows.
Design Architect/Board Architect to Board Station RE Flow
Design Architect/Board Architect to Board Station XE Flow
User Interface
Customizing the Windows Display
Use the CES Browser and the Spreadsheets
Edit Data in Spreadsheets
Interface with the PCB Data
Creating Net Class and Schemes
Create Schemes
Create and populate Net Classes
Setting Up Mechanical Constraints
Set up Trace and Via Properties
Set up Clearance Rules
Creating Constraint Classes
Setting up Differential Pairs and Net Properties
Create differential pairs
Set differential pair constraints
Assign custom topologies
Assign complex topologies
Setting up delays and parallelism
Assign length and match group constraints
Set up delays formulas
Set up parallelism rules
Route delay and length constrained nets
Using Constraint Templates
Import and export Constraint Templates
Test Constraint Templates
Assign Constraint Templates to nets
Audience
This course is for anyone who has worked with constraint-driven high-speed PCB designs.

PCB Design Engineers
PCB layout personnel
Signal Integrity Engineers
Design managers
Project Managers
Prerequisites
Familiarity with Windows 98, NT, 2000, XP or UNIX operating systems

Key Topics
CES Overview
CES in the flow
CES User Interface
Net Classes and Schemes
Setting up Mechanical Constraints
Creating Constraint Classes
Net Properties and Differential Pairs
Delays and Parallelism
Using constraint templates
...''

Phone:(65) 6779 0075

School Address:

Mentor Graphics Asia Pte Ltd
238A Thomson Road #23-07
Novena Square Tower A
Singapore 307684



Jobs & Resumes: Singapore
Houses & Roommates: Singapore

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